Interests: Computer Architecture, Power-Aware Computing, and Mobile Computing.
HPCA Test-of-Time Paper Award, 2018; IEEE Computer Society Technical Achievement Award, 2018; Marie Pistilli Women in EDA Achievement Award, 2015; Anita Borg Institute Technical Leadership Award, 2013; ACM Fellow, 2009; IEEE Fellow, 2010.
Active Research Projects:
Margaret Martonosi is the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University, where she has been on the faculty since 1994. She is also Director of the Princeton’s Keller Center for Innovation in Engineering Education, and an A. D. White Visiting Professor-at-Large at Cornell University. From August 2015 through March, 2017, Martonosi was a Jefferson Science Fellow within the U.S. Department of State.
Martonosi's research interests are in computer architecture and mobile computing. Her work has included the widely-used Wattch power modeling tool and the Princeton ZebraNet mobile sensor network project for the design and real-world deployment of zebra tracking collars in Kenya. Her current research focuses on computer architecture and hardware-software interface issues in both classical and quantum computing systems.
Martonosi is a Fellow of IEEE and ACM. Her papers have received numerous long-term impact awards including: 2015 ISCA Long-Term Influential Paper Award, 2017 ACM SIGMOBILE Test-of-Time Award, 2017 ACM SenSys Test-of-Time Paper award, and the 2018 (Inaugural) HPCA Test-of-Time Paper award. Other notable awards include the 2018 IEEE Computer Society Technical Achievement Award, 2010 Princeton University Graduate Mentoring Award, the 2013 NCWIT Undergraduate Research Mentoring Award, the 2013 Anita Borg Institute Technical Leadership Award, and the 2015 Marie Pistilli Women in EDA Achievement Award. In addition to many archival publications, Martonosi is an inventor on seven granted US patents, and has co-authored two technical reference books on power-aware computer architecture. Martonosi completed her Ph.D. at Stanford University.
- "COATCheck: Verifying Memory Ordering at the Hardware-OS Interface", Daniel Lustig, Geet Sethi, Margaret Martonosi, and Abhishek Bhattacharjee, 21st International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April 2016. (Selected for 2017 IEEE Micro Top Picks in Computer Architecture)
- “PipeCheck: Specifying and Verifying Microarchitectural Enforcement of Memory Consistency Models.” Dan Lustig, Michael Pellauer and Margaret Martonosi. 47th Annual IEEE/ACM International Symposium on Microarchitecture, Cambridge, U.K., December 2014. (Nominated for Best Paper Award).
- “Human Mobility Characterization from Cellular Network Data.” Richard A. Becker, Ramón Cáceres, Karrie J. Hanson, Sibren Isaacman, Ji Meng Loh, Margaret Martonosi, James Rowland, Simon Urbanek, Alexander Varshavsky and Chris Volinsky. CACM. January 2013.
- “Hardware Design Experiences in ZebraNet.” P. Zhang, C. Sadler, S. Lyon and M. Martonosi. Proceedings of SenSys 2004, November 2004.
- “Wattch: A Framework for Architectural-Level Power Analysis and Optimizations.” David Brooks and Margaret Martonosi. 27th International Symposium on Computer Architecture, June, 2000, pages 83-94. (Earned ISCA's 2015 Long-Term Influential Paper Award).