Optimizations of Machine Descriptions for Efficient Use


When talking about the IMPACT compiler's optimizations, I had been
wondering how the MDES were created.  I really liked the ideas for
how to organize machine descriptions in this paper, they seemed like
a logical and simple improvement over some other techniques.  One
problem I was having with the whole scheduling problems is that I
don't have enough of an understanding of the scheduling mechanisms
that the paper assumed would provide optimization for the processors.
It seemed to me that say a program had three independent operations
that optimizations said could all be scheduled for a single cycle,
but then that there was overlap on some smaller cycle resource and
the process needed to be delayed.  Maybe that is ok, but which of the
three instructions should get delayed and why.  I feel like the MDES
is not being utilized enough in the parallelism of the program.
Maybe you just can try to schedule everything as soon as possible and
that will make it optimal, I need to think about that more, but
intuitively for me it seems like there might be a more optimal
schedule.  In the case that more information needs to be extracted
from the MDES for optimization then I feel that the structure
proposed might not be the ideal method of storage for access.  I've
very unsure of myself on this subject, but it seems like improvements
are possible especially when you are dealing with 6-way processors
and even more importantly since the IA-64 will not have any dynamic
scheduling to possibly improve scheduling mistakes or imperfections
at run-time.