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### Reading Assignment and Discussion Topics

Computer Science 471

*for class on
Thursday
Sept. 28, 2000*

Please read
Sections 4.1 through 4.5
of the Patterson & Hennessy text,
and be prepared to discuss the following issues:

The text develops the design for a MIPS ALU, which is brought to glorious
fruition in Figure 4.19. Well, maybe not so glorious: this design is
both broken and slow. Please figure out what you might do about these
problems. The broken part is the *Set* output from the most significant
bit; to see why, consult Exercise 4.23.
(Exercise 4.42 may also be helpful.) Then consider how you would
speed up a non-broken version
of the ALU. A faster adder will surely help (and is discussed in the text). But even with a fast adder, there will be some long combinational
logic paths through the design.
(Remember that a logical "path" is just a route from
some input to some output that passes through a sequence of interconnected parts.) Try to see how to shorten the longest ones by re-arranging, compressing, or otherwise redesigning the logic.
Feel free to use more logic to reduce delays. Make some sketches of your ideas.