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for class on Tuesday Sept. 19, 2000
Please read Appendix B of the Patterson & Hennessy text, and be prepared to discuss the following issues:
1. We looked at the datapath of a simple processor last time. Let's add the nasty details: the control and the clocking. Assume that all the state devices (accumulator, registers) are made of edge-triggered D-type flip-flops, and that the Memory is written by a pulse and not a clock-edge. We will figure out exactly when each state device should be clocked, when each multiplexor should be switched, and when the Memory should be written. You will want to do a sketch of your ideas about this. You may assume the existence of any number of (periodic) clock signals of whatever shape you like. You need not concern yourself with clock skew, races, or other electronic esoterica.
2. We want this machine to get the right answer, of course, but we also want to get the answer fast. How would you analyze the speed of our simple processor?