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Projects:
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UpTCP: User-level Parallelized TCP/IP Stack for Multicore/Manycore
The UpTCP project aims to design an OS-kernel independent parallelized TCP/IP stack that is intended to be integrated into a new version of PARSEC benchmark.
Memory System Design for High-Throughput Computing
Our goals is to analyze and optimize memory system performance for multicore system with high-bandwidth I/O devices. Based on our observation that multicore poses the potential of unexploited memory-level parallelism (MLP), we revisit virtual channel memory (VCM) technology to exploit potential MLP as well as to solve both memory contention and QoS problems.
- HMTT: A Hybrid Hardware/Software Memory Trace Tool (News: HMTT v3 is released)
We can provide off-chip memory traces of many real-world applications, e.g., SPECCPU, SPECjbb, TPC-H/TPC-C on Oracle, and SPECWeb on Apache, with abundant important information, such as timestamp, pid, cpu-request/io-request, r/w, virt_addr and phys_addr. However, the trace sizes are quite large, being several hundred Gigabytes. We would like to provide the traces to the research community via sending hard disks. If you need the traces, please contact us.
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Selected Papers:
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- Licheng Chen, Zehan Cui, Yongbing Huang, Yungang Bao, Guangming Tan, Mingyu Chen, A Lightweight Hybrid Hardware/Software Approach for Object-Relative Memory Profiling, to appear in IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), New Brunswick, NJ, April 1-3, 2012.
- Erlin Yao, Yungang Bao, Mingyu Chen, What Hill-Marty model learn from and break through Amdahl's law?, Information Processing Letters (IPL), 2011. [pdf]
- Guangming Tan, Linchuan Li, Sean Triechle, Everett Phillips, Yungang Bao, Ninghui Sun, Fast Implementation of DGEMM on Fermi GPU, ACM/IEEE Supercomputing (SC), 2011. [pdf]
- Zehan Cui, Yan Zhu, Yungang Bao and Mingyu Chen, A Fine-grained component-level power measurement method, The First International Workshop on Power Measurement and Profiling (PMP) in conjunction with IEEE IGCC, 2011. [pdf]
- Dan Tang, Yungang Bao, Weiwu Hu, Mingyu Chen,
DMA Cache: Using On-Chip Storage to Architecturally Separate I/O Data from CPU Data for Improving I/O Performance, in the 16th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2010. [pdf],[ppt]
- Erlin Yao, Yungang Bao, Guangming Tan, Mingyu Chen,
Extending Amdahl's Law in the Multicore Era, ACM SIGMETRICS Performance Evaluation Review, Volume 37 , Issue 2, September 2009. [pdf]
(The original version was presented in the Eleventh Workshop on MAthematical Performance Modeling and Analysis (MAMA) in conjunction with ACM SIGMETRICS 2009, Seattle, WA, USA, June 15, 2009. [ppt])
- Dan Tang, Yungang Bao, Yunji Chen, Weiwu Hu, Mingyu Chen,
Exploiting the Produce-Consume Relationship in DMA to Improve I/O Performanc, Workshop on The Influence of I/O on Microprocessor Architecture (IOM) in conjunction with the 15th International Symposium on High-Performance Computer Architecture (HPCA), Raleigh, North Carolina, February 15, 2009. [pdf],[ppt],
- Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu,
Jianping Fan, Qingbo Yuan, Bo Song, Jianwei Xu,
HMTT: A Platform Independent Full-System Memory Trace Monitoring System, International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS),Annapolis, Maryland, USA, June 2-6,2008.[pdf]
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Professional Activities:
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- IEEE Transactions on VLSI Systems (TVLSI), Reviewer
- IEEE Transactions on Parallel and Distributed Systems (TPDS), Reviewer
- Journal of Parallel and Distributed Computing (JPDC), Reviewer
- The 1st International Workshop on Power Measurement and Profiling (PMP), 2011, Program Committee
- IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2011, Program Committee
- International Conference on High Performance Computing (HiPC), 2011, External Reviewer
- International Conference on Supercomputing (ICS) 2010, External Reviewer
- Supercomputing (SC) 2009, External Reviewer
- Supercomputing (SC) 2008, External Reviewer
- HPC-Asia'05 External Reviewer
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