Resume for Wen Xu

Department of Computer Science	Office: 609-258-2072
Princeton University	Fax: 609-258-1771
35 Olden Street	wxu@cs.princeton.edu
Princeton, NJ 08544	http://www.cs.princeton.edu/~wxu/

Princeton University, Princeton, NJ
- Ph.D in Computer Science, expected summer 2006
- M.A. in Computer Science, June 2002
Institute of Software, Chinese Academy of Sciences, Beijing, P.R.China
- M.S. in Computer Software and Theory, June 2000
Zhejiang University, Hangzhou, Zhejiang, P.R.China
- B.E. in Computer Science and Engineering, June 1997

Wen Xu and Jennifer Rexford.
MIRO: Multi-path Interdomain ROuting. To appear in SIGCOMM 2006, Sept. 2006
Wen Xu, Sanjeev Kumar, and Kai Li.
Fast Paths in Concurrent Programs. ACM/IEEE International Conference on Parallel Architecture and Compilation Techniques (PACT), Sept. 2004
Prashant Pradhan, Indira Nair, Sambit Sahu, and Wen Xu.
Efficient and Faithful Performance Modeling for Network-Processor-Based System Designs. Workshop on Network Processors and Applications (NP-2), Feb. 2004
Wen Xu and Larry Peterson.
Support for Software Performance Tuning on Network Processors. IEEE Network, Vol. 17, No. 4, July 2003
Wen Xu, Hai Fang, and Huimin Lin.
Optimization and Implementation of a Bisimulation Checking Algorithm for the p-calculus. Journal of Software (Chinese), Vol. 12, No. 2, Feb. 2001
Hai Fang, Wen Xu, and Huimin Lin.
Local Optimization Algorithms for Symbolic Transition Graph with Assignment. Journal of Computer Research and Development (Chinese), Vol. 37, No. 1, Jan. 2000

Programming: 11+ years experience of C, proficient in C++, Java, ML, Perl, Python, Shell
OS: Linux Kernel Programming, FreeBSD, Windows
Others: Program parallelization and verification, Compiler hacking, Routing

Princeton University, Princeton, NJ
Research Assistant, 2001 - present
- Parallelizing TCP/IP Protocol on Chip-Multiprocessors (Program Parallelization and Verification, TCP/IP Protocol, Linux Kernel Code)
- Fast Paths in Concurrent Programs (Program Optimizations)
- Network Processor Performance Tuning (Performance Tuning, Parallel Architecture)
Teaching Assistant
- Introduction to Programming Systems (COS 217, Fall 2000 and Spring 2001)

IBM T.J.Watson Research Center, Hawthorne, NY
Summer Intern, Summer 2002
- Modeling the Processor in System Simulation (Application Code Annotation)

Institute of Software, Chinese Academy of Sciences, Beijing, P.R.China
Research Assistant, 1997 - 2000
- Developing Formal Verification Tools for Concurrent Systems (Formal Verification)