Chen, Y., Clark, D.W., Finkelstein, A., Housel, T., and Li, K. ``Automatic Alignment Of High-Resolution Multi-Projector Displays Using An Un-Calibrated Camera,'' IEEE Visualization 2000, Salt Lake City, Oct. 2000, to appear. pdf | color plate (pdf)
Skadron, K., Martonosi, M., and Clark, D.W. ``A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions,'' Int. Conf. on Parallel Architectures and Compilation Techniques, Philadelphia, Oct. 2000, to appear.
Li, K., Chen, H., Chen, Y., Clark, D.W., Cook, P., Damianakis, S., Essl, G., Finkelstein, A., Funkhouser, T., Housel, T., Klein, A., Liu, Z., Praun, E., Samanta, R., Shedd, B., Singh, J.P., Tzanetakis, G., and Zheng, J. ``Building and Using a Scalable Display Wall System,'' IEEE Computer Graphics and Applications 20, 4 (July/Aug. 2000), pp. 29-37. pdf
Skadron, K., Martonosi, M., and Clark, D.W. ``Speculative Updates of Local and Global Branch History: A Quantitative Analysis,'' The Journal of Instruction Level Parallelism, vol. 2, Jan. 2000 (https://www.jilp.org/vol2). postscript
Skadron, K., Ahuja, P.S., Martonosi, M., and Clark, D.W. ``Branch Prediction, Instruction-Window Size, and Cache Size: Performance Tradeoffs and Sampling Techniques,'' IEEE Transactions on Computers 48, 3 (Nov. 1999), pp. 1260-1281. postscript
Liao, C., Martonosi, M., and Clark, D.W. ``Experience with an Adaptive Globally-Synchronizing Clock Algorithm,'' Proc. 11th ACM Symp. on Parallel Algorithms and Architectures, Saint-Malo, France, June 1999. postscript
Liao, C., Martonosi, M., and Clark, D.W. ``An Adaptive Globally-Synchronizing Clock Algorithm and its Implementation on a Myrinet-based PC Cluster,'' Proc. SIGMETRICS Conf. on Measurement and Modeling of Computer Systems, Atlanta, May 1999 (poster). postscript
Zhou, Y., Wang, L., Clark, D.W., and Li, K. ``Thread Scheduling for Out-of-Core Applications with Memory Server on Multicomputers,'' Proc. 6th Workshop on I/O in Parallel and Distributed Systems, Atlanta, May 1999, pp. 57-67. postscript
Skadron, K., Ahuja, P.S., Martonosi, M., and Clark, D.W. ``Improving Prediction for Procedure Returns with Return-Address-Stack Repair Mechanisms,'' Proc. 31st Annual Int. Symposium on Microarchitecture, Dallas, Dec. 1998. postscript
Wei, B., Clark, D.W., Felten, E.W., Li, K., and Stoll, G. ``Performance Issues of a Distributed Frame Buffer on a Multicomputer,'' Proc. 1998 Eurographics/SIGGRAPH Workshop on Graphics Hardware, Lisbon, Aug./Sept. 1998.
Liao, C., Martonosi, M., and Clark, D.W. ``Performance Monitoring in a Myrinet-Connected Shrimp Cluster,'' Proc. 2nd SIGMETRICS Symposium on Parallel and Distributed Tools, Oregon, August 1998. postscript
Ahuja, P.S., Skadron, K., Martonosi, M., and Clark, D.W. ``Multipath Execution: Opportunities and Limits,'' Proc. 12th International Conference on Supercomputing, Melbourne, July 1998. postscript
Liao, C., Jiang, D., Iftode, L., Martonosi, M., and Clark, D.W. ``Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster,'' Proc. 12th International Conference on Supercomputing, Melbourne, July 1998. postscript
Blumrich, M.A., Alpert, R.D., Chen, Y., Clark, D.W., Damianakis, S.N., Dubnicki, C., Felten, E.W., Iftode, L., Li, K., Martonosi, M., and Shillner, R.A. ``Design Choices in the SHRIMP System: An Empirical Study," Proc. 25th Intl. Symposium on Computer Architecture, Barcelona, June 1998, pp. 330-341. postscript
Wei, B., Stoll, G., Felten, E.F., Clark, D.W., and Li, K. ``RAIN: Supporting Parallel Graphics on Paragon Multicomputers,'' Proc. 13th Ann. Conf., Intel Supercomputer Users Group, Albuquerque, June 1997.
Skadron, K. and Clark, D.W. ``Design Issues and Trade-offs for Write Buffers,'' Proc. Third Intl. Symposium on High-Performance Computer Architecture, San Antonio, Feb. 1997, pp. 144-155. postscript
Martonosi, M., Clark, D.W., and Mesarina, M., ``The SHRIMP Hardware Performance Monitor: Design and Applications," Proc. SIGMETRICS Symposium on Parallel and Distributed Tools, Philadelphia, May 1996. postscript
Felten, E.W., Alpert, R.D., Bilas, A., Blumrich, M.A., Clark, D.W., Damianakis, S., Dubnicki, C., Iftode, L., and Li, K., ``Early Experience with Message-Passing on the SHRIMP Multicomputer," Proc. 23rd Intl. Symposium on Computer Architecture, Philadelphia, May 1996, pp. 296-307. postscript
Ahuja, P.S., Clark, D.W., and Rogers, A., ``The Performance Impact of Incomplete Bypassing in Processor Pipelines," 28th IEEE/ACM Annual Int. Symp. on Micro-Arch. (MICRO-28), Ann Arbor, Nov. 1995, pp. 36-45. postscript
Wei, B., Stoll, G., Clark, D.W., Felten, E.W., Li, K., and Hanrahan, P., ``Synchronization for a Multi-Port Frame Buffer on a Mesh-Connected Multicomputer," Proc. Parallel Rendering Symposium, Atlanta, Oct. 1995, pp. 81-88. postscript
Stoll, G., Wei, B., Clark, D.W., Felten, E.W., Li, K., and Hanrahan, P., ``Evaluating Multi-Port Frame Buffer Designs for a Mesh-Connected Multicomputer," Proc. 22nd International Symposium on Computer Architecture, Santa Margherita Ligure, Italy, June 1995, pp 96-105.
Clark, D.W. and Weng, L.-J., ``Maximal and Near-Maximal Shift Register Sequences: Efficient Event Counters and Easy Discrete Logarithms," IEEE Transactions on Computers 43, 5 (May 1994), pp. 560-568. postscript
Bhandarkar, D. and Clark, D.W., ``Performance from Architecture: Comparing a RISC and a CISC with Similar Hardware Organization," Proc. Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, Santa Clara, CA, April 1991, pp. 310-319. postscript
Clark, D.W., ``Large-Scale Hardware Simulation: Modeling and Verification Strategies" (invited paper), Chapter 9 of CMU Computer Science: A 25th Anniversary Commemorative (R.F. Rashid, ed.), ACM Press/Addison-Wesley, 1991, pp. 219-234. postscript