David I. August
Associate Professor of the Department of Computer Science, Princeton University
Affiliated with the Department of Electrical Engineering, Princeton University
Ph.D. May 2000, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign

Office: Computer Science Building Room 209
Email: august@cs.princeton.edu
Phone: (609) 258-2085
Fax: (609) 258-2085
Assistant: Donna O'Leary, (609) 258-1746

Front Page Publication List (with stats) Curriculum Vitae (PDF) The Liberty Research Group
Research
My primary research interests are in synergistic compiler and microarchitecture design.
I lead the Liberty Research Group.
STUDENTS: Before contacting me about joining my group read this.

Selected Recent Publications (See Publication List or Curriculum Vitae (PDF) for full list.)
  • Revisiting the Sequential Programming Model for Multi-Core (IEEE Micro’s "Top Picks" 2008, original work at MICRO 2007)
  • Automatic Instruction-Level Software-Only Recovery Methods (IEEE Micro’s "Top Picks" 2007, original work at DSN 2006)
  • Shape Analysis with Inductive Recursion Synthesis (PLDI 2007)
  • Fault-tolerant Typed Assembly Language (PLDI 2007)
  • Support for High-Frequency Streaming in CMPs (MICRO 2006)
  • Automatic Instruction Scheduler Retargeting by Reverse-Engineering (PLDI 2006)
  • A Framework for Unrestricted Whole-Program Optimization (PLDI 2006)
  • Exploiting Parallelism and Structure to Accelerate the Simulation of Chip Multi-processors (HPCA 2006, related work at DAC 2003)
  • The Liberty Simulation Environment: A Deliberate Approach to High-Level System Modeling (TOCS 2006, related work at MICRO 2002)
  • Automatic Thread Extraction with Decoupled Software Pipelining (MICRO 2005, related work at PACT 2006)
  • Design and Evaluation of Hybrid Fault-Detection Systems (ISCA 2005, related work at CGO 2005 and TACO 2005)
  • Compiler Optimization-Space Exploration (JILP 2005, related work at CGO 2003)

  • Selected Recent Professional Activities (See Curriculum Vitae (PDF) for full list.)
  • Program Committee: PLDI 2008
  • Panel: "Are New Programming Languages Needed to Exploit Manycore Architectures?" at the Microsoft Faculty Summit, July 2007.
  • Panel: "Programming Languages/Models and Compiler Technologies" at the Manycore Computing Workshop, June 2007.
  • Program Committee: IEEE/ACM ISCA 2007
  • Program Chair: IEEE/ACM CGO 2007 (Record submission rate!)
  • General Chair: IEEE/ACM CGO 2006 (Record attendance!)
  • Program Committee: IEEE/ACM MICRO 2006
  • Associate Editor: ACM Transactions on Architecture and Code Optimization

  • Selected Recent Recognition (See Curriculum Vitae (PDF) for full list.)
  • Selection of Revisiting the Sequential Programming Model for Multi-Core for IEEE Micro’s "Top Picks" special issue for papers "most relevant to industry and significant in contribution to the field of computer architecture" in 2007.
  • Best Paper Award for Fault-tolerant Type Assembly Language at the 2007 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), June 2007.
  • Selection of Automatic Instruction-Level Software-Only Recovery Methods for IEEE Micro’s "Top Picks" special issue for papers "most relevant to industry and significant in contribution to the field of computer architecture" in 2006.

  • Current Ph.D. Students

  • Arun Raman [Publications]
  • Thomas B. Jablin [Publications]
  • Yun Zhang [Publications]
  • Hanjun Kim [Publications]
  • Tzu-Han Hung [Publications]
  • Jialu Huang [Publications]
  • Prakash Prabhu [Publications]
  • Nicholas P. Johnson [Publications]
  • Alexander Wauck [Publications]

  • Alumni

  • Easwaran Raman [Publications] Ph.D. Thesis: Parallelization Techniques with Improved Dependence Handling, 2009.
    First Position: Google
  • Thomas Mason [Publications] Master of Science Degree, 2009.
    First Position: Johns Hopkins University Applied Physics Laboratory
  • Neil Vachharajani [Publications] Ph.D. Thesis: Intelligent Speculation for Pipelined Multithreading, 2008.
    First Position: Google
  • Bolei Guo [Publications] Ph.D. Thesis: Shape Analysis with Inductive Recursion Synthesis, 2008.
    First Position: J. P. Morgan
  • George A. Reis [Publications] Ph.D. Thesis: Software Modulated Fault Tolerance, 2008.
    First Position: Google
  • Matthew J. Bridges [Publications] Ph.D. Thesis: The VELOCITY Compiler: Extracting Efficient Multicore Execution from Legacy Sequential Codes, 2008.
    First Position: Google
  • Guilherme de Lima Ottoni [Publications] Ph.D. Thesis: Global Instruction Scheduling for Multi-Threaded Architectures, 2008.
    First Position: Intel Research
  • Ram Rangan [Publications] Ph.D. Thesis: Pipelined Multithreading Transformations and Support Mechanisms, 2007.
    First Position: Post-Doctoral Researcher at IBM Austin Research Laboratory
  • Mario Ibrahim [Publications] Master of Engineering Degree, 2006.
    First Position: IBM
  • David Penry [Publications] Ph.D. Thesis: The Acceleration of Structural Microarchitecture Simulation via Scheduling, 2006.
    First Position: Assistant Professor at Brigham Young University
  • Spyridon Triantafyllis [Publications] Ph.D. Thesis: Eliminating Scope and Selection Restrictions in Compiler Optimizations, 2006.
    First Position: D. E. Shaw
  • Jason A. Blome [Publications] Master of Science Degree, 2004.
    First Position: Ph.D. candidate at University of Michigan
  • Manish Vachharajani [Publications] Ph.D. Thesis: Microarchitecture Modeling for Design-space Exploration, 2004.
    First Position: Assistant Professor at University of Colorado, Boulder

  • Teaching
  • Computer Architecture: COS-471A, COS-471B/ELE-375 (Fall 2003, 2004, 2005)
  • Compiling Techniques: COS-320 (Spring 2000, 2001, 2002, 2007)
  • Introduction to Programming Systems: COS-217 (Fall 2006, 2007)
  • General Computer Science: COS-126 (Fall 2002, Spring 2003)
  • Topics in Compilation for Multiprocessors (Spring 2006)
  • Topics in Compiler Construction: COS-598 (Spring 2004)
  • Feedback-Directed Optimization: COS-597 (Fall 2001)
  • Computer Architecture Research Infrastructure: COS-597 (Fall 2000)
  • Synergistic Hardware-Compiler Architecture Design: COS-597 (Fall 1999)