Professor, Department of Computer Science,
e-mail: aslp at cs dot dot edu
phone: (609) 258-4568
fax: (609) 258-1771
Professor LaPaugh has worked extensively in the development of algorithms for problems in digital design. A major area of research has been VLSI circuit layout: investigating the interactions between placement and detailed routing. She has developed algorithms that use these interactions to find better placements for circuit components. An important application of the work is in the placement of hierarchically defined layouts.
Another focus of Professor LaPaugh's research has been in the synthesis and verification of digital systems from high-level descriptions. One project in this area was the representation and verification of timing requirements for asynchronous digital systems. Another was the scheduling of program iterations on hardware (software pipelining). Professor LaPaugh has explored the relationship between techniques used by hardware synthesis and program compilation. Many issues are shared by compiler writers for multi-issue machines and synthesis tool writers for special-purpose hardware.
Much of Professor LaPaugh's work is based on the principles of combinatorial algorithm design. In addition to her work in application areas, she has developed and analyzed algorithms for theoretical combinatorial problems such as graph structure problems.