An important aspect of a high-speed network system is the ability to transfer data directly between the network interface and the application buffers. Such a direct data path requires the network interface to ``know'' the virtual-to-physical address translation of a user buffer, i.e., the physical memory location of the buffer. This paper presents an efficient address translation architecture, User-managed TLB (UTLB), which eliminates system calls and device interrupts from the common path of communication. With the UTLB architecture, the network interface can translate a virtual page address in 0.5 microseconds in the best case. The average overhead of an address translation is less than 2 microseconds under the heavy load of multi-programming on a 4-way SMP. The paper describes the design of the UTLB and its implementation as part of a custom communication layer. Results from micro-measurements and trace-driven analysis are given to evaluate the effectiveness of the UTLB architecture.