Quick links

An Evaluation of Multiprocessor Cache Coherence Based on Virtual Memory Support

Report ID:
November 1992
Download Formats:


This paper presents an evaluation of the impact of several
architectural parameters on the performance of Virtual Memory (VM)
based cache coherence schemes for shared-memory multiprocessors. The
VM-based c ache coherence schemes use the traditional VM translation
hardware on each processor to detect memory access attempts that might
leave caches incoherent, and maintain coherence through VM-level
system software. The implementation of this class of coherence
schemes is flexible and economical: It allows differe nt consistency
models, requires no special hardware for multiprocessor cache
coherence, and supports arbitrary interconnection networks.
We used trace-driven simulations to evaluate the effect of
different architectural parameters on the performance of the VM-based
schemes. These parameters include VM page sizes, write-back and
write-through caches, memory access latencies, bus and crossbar
interconnections, and different cache sizes. Our results show
that for appropriate parameters VM-based cache coherence is an
economical and practical approach for building shared-memory

Follow us: Facebook Twitter Linkedin