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Cache Coherence for Shared Memory Multiprocessors Based on Virtual Memory Support

Report ID:
November 1992
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This paper presents a software cache coherence scheme that uses
virtual memory (VM) support to maintain cache coherency for shared memory
multiprocessors and requires no special hardware to do so.
Traditional VM translation hardware in each processor is used to detect
memory access attempts that would violate cache coherence and system
software is used to enforce coherence. The implementation of this class
of coherence schemes is extremely economical: it requires neither special
multiprocessor hardware nor compiler support, and easily incorporates
different consistency models.
We evaluated two consistency models for the VM-based approach:
sequential consistency and lazy release consistency. The VM-based
schemes are compared with a bus based snoopy caching architecture,
and our trace-driven simulation results show that the VM-based cache
coherence schemes are practical for small-scale, shared memory

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