00: 0684                                 // contents of LFBSR stored here

10: B61E   R6 <- 30                      //  do { R6 = 30
11: 81F0     jump and link to F0         //    R3 <- pseudo-random bit
12: 4300     print R3                    //    print R3
13: 7611     R6--; if (R6 > 0) goto 11   //    R6--
                                         //  } while (R6 > 0)
14: 0000   halt                         

F0: 9200   R2 <- mem[0]                  // simulate one step of a LFBSR
F1: 9300   R3 <- mem[0]                  
F2: B001   R0 <- 1                       
F3: E203   R2 <- R2 >> 3                 // put 3rd bit of LFBSR in R2
F4: D220   R2 <- R2 & 1                  
F5: E30A   R3 <- R3 >> 10                // put 10th bit of LFBSR in R3
F6: D330   R3 <- R3 & 1                  
F7: C323   R3 <- R2 ^ R3                 // new bit (XOR of 3rd and 10th bits)
F8: 9200   R2 <- mem[0]                  // update LFBSR
F9: F201   R2 <- R2 << 1                 
FA: 1223   R2 <- R2 + R3                 
FB: A200   mem[0] <- R2                  
FC: B000   R0 <- 0                       // return using indexed addressing
FD: 5801   jump to addr in R1