2
for class on Tuesday Sept. 16, 1997
Please read Appendix B of the Patterson & Hennessy text, and be prepared to discuss the following issues:
1. We looked at the datapath of a simple processor last time. Let's add the nasty details: the control and the clocking. Assume that all the state devices (accumulator, registers) are made of edge-triggered D-type flip-flops. We will figure out exactly when each state device should be clocked, and when each multiplexor should be switched. You may want to do a sketch of your ideas about this. You may assume the existence of any number of clock signals of whatever shape you like. It may be helpful to think of the central control of this processor as a finite-state machine.
2. We want this machine to get the right answer, of course, but we also want to get the answer fast. In our simple processor, what do you think will determine the speed?