for class on Thursday Nov. 21, 1996
Please read Sections 7.4 and 7.5 of the Patterson & Hennessy text very carefully, and possibly more than one time (this has proved to be a difficult subject for past 471 classes), and be prepared to discuss the following issue:
If we use the word cache in its generic sense, we can think of physical memory as a cache of recently-used virtual memory pages. We can further think of a TLB as a cache of virtual-to-physical address translations. We will explore these analogies--how well do you think they work? Consider: block size, reads versus writes, hit ratio, replacement policy, and how misses are serviced.