5
for class on
Monday
Oct. 1, 2012
Please read Sections 2.10 and 2.14
of the Patterson & Hennessy text,
the case Byte Addressing: From Laboratory to Practice, and
the paper Hardware/Software Tradeoffs for Increased
Performance, particularly the passages marked with a wavey line in the left margin. You will probably find parts of this paper hard to understand; you need not master the whole thing.
Please turn in written responses to these questions:
1. MIPS has byte addressing and load byte instructions, but suppose that instead it had a word-addressed memory architecture and did not have load byte at all (this is the original Hennessy idea). Write out the MIPS code required in this situation to load an arbitrary byte from memory into a register. Don't bother to sign-extend the byte; just implement load-byte-unsigned, which zero-extends the byte. Assume that the byte address starts out in a register.
2. Same idea for store-byte: write MIPS code to move the low-order byte from a register into an arbitrary byte of memory, while not altering the other memory bytes, again assuming word addressing, no store byte instruction, and that the desired destination is specified as a byte address in a register.
In the above questions, remember that even though the memory instructions themselves operate on word addresses, the concept of a byte address still makes sense to a programmer or a compiler. Also remember that MIPS is Big Endian: the most significant, or leftmost, byte in a word is byte 0.
Then, be prepared to discuss the following in class:
3. How would you summarize the points of view of the two Johns in the "Byte Addressing" case?
4. Hennessy's performance claim is based on the increased length of a certain logic path in the byte-addressed machine. What hardware do you think is involved?
5. From your knowledge of C, what problems can you imagine in a port of C-based Unix to a word-addressed architecture?
6. What should Hennessy do?