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Reading and Writing Assignments, Discussion Topics
COS/ELE 375

for class on Monday Nov. 19, 2012

Please read Sections 5.1 and 5.2 of the text.

Please turn in a written response to these questions:

For questions 1, 2, and 3 below, answer for both rows a and b of the table in Exercise 5.4. Use the mustard-cover version of these, which are:

• row a: Tag bits 31-10; index bits 9-5; offset bits 4-0
• row b: Tag bits 31-12; index bits 11-6; offset bits 5-0

1. Exercise 5.4.4

2. Exercise 5.4.5

3. Exercise 5.4.6

Then, be prepared to discuss the following in class:

4. There are really three different types of cache references: loads, stores, and instruction (or "I-stream") reads. Each can either hit or miss in a cache. We'll look at basic cache hardware and go through some simple cache scenarios involving these reference types. Cache misses ordinarily cause instructions to wait; how might the processor pipeline accommodate each of the three possible sources of cache misses?