7
for class on
Monday
Oct. 11, 2010
Please read Sections 3.3 through 3.6 of the Patterson & Hennessy text. The remaining sections of Chapter 3 are worth a look too, particularly 3.8 and 3.10 (on the CD).
Please turn in written responses to these questions:
1. Let x = 10010.1101 and y = 00110011.1 and z = -111100.10101 be three numbers in base 2 (note that z is negative). Show exactly how x, y, and z would be represented in the IEEE single-precision floating-point format. Show all the bits, just as they would appear in a MIPS register or memory word.
2. Show the steps involved in the single-precision
floating-point addition of x and y
from question 1. Use binary operations,
and show all the partial results along the way. The operands must start out in
IEEE format. This question does not ask you to
design any hardware, just to show the computational
steps, like "shift significand" and
"normalize" and "round" and things like that. Assume
that the rounding rule is: round to the nearest representable number, and round
to the even one
if the result is exactly half-way between the two nearest representable numbers.
Show all the bits of the result in IEEE format, just as in
question 1.
Then, be prepared to discuss the following in class:
3. What would a floating-point multiply circuit look like? Let's make one in the style of Figure 3.16, which is a block diagram of a floating-point adder. An integer-style multiplier will be needed somewhere in the middle of our circuit; we will not work on the insides of this at all. Single precision, IEEE format. Your instructor is always a little shaky on rounding, overflow, and underflow; any help you can give him with these matters will be appreciated. As usual, you should do a sketch of your ideas as part of your preparation.