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for class on Tuesday Nov. 28, 2000
Please read Sections 7.4 and 7.5 of the Patterson & Hennessy text very carefully, and possibly more than one time (this has proved to be a difficult subject for past 471 classes), and be prepared to discuss the following issues:
If we use the word cache in its generic sense, we can think of physical memory as a cache of recently-used virtual memory pages. We can further think of a TLB as a cache of virtual-to-physical address translations. We will explore these analogies in some detail, considering how the three types of cache are similar or different along a number of different dimensions, among them: block size, reads versus writes, hit ratio, replacement policy, and how misses are serviced.
A miss in physical memory is a page fault. What do you think should happen to the cache and TLB on a page fault?